剧情简介:This book will help engineers write better Verilog/SystemVerilog design and verification code as well as deliver digital designs to market more quickly. It shows over 100 common coding mistakes that can be made with the Verilog and SystemVerilog languages. Each example explains in detail the symptoms of the error, the languages rules that cover the error, and the correct coding...(展开全部)
作者:Don Mills
出版社:Springer
ISBN:9780387717142